Making CSB + -Trees Processor Conscious

Michael Samuel, Anders Uhl Pedersen, Philippe Bonnet

    Research output: Contribution to conference - NOT published in proceeding or journalConference abstract for conferenceResearchpeer-review

    Abstract

    Cache-conscious indexes, such as CSB+-tree, are sensitive to the underlying processor architecture. In this paper, we focus on how to adapt the CSB+-tree so that it performs well on a range of different processor architectures. Previous work has focused on the impact of node size on the performance of the CSB+-tree. We argue that it is necessary to consider a larger group of parameters in order to adapt CSB+-tree to processor architectures as different as Pentium and Itanium. We identify this group of parameters and study how it impacts the performance of CSB+-tree on Itanium 2. Finally, we propose a systematic method for adapting CSB+-tree to new platforms. This work is a first step towards integrating CSB+-tree in MySQL’s heap storage manager.
    Original languageEnglish
    Publication date2005
    Number of pages6
    Publication statusPublished - 2005

    Keywords

    • b+-tree
    • index
    • Performance
    • Measurement
    • cache-conscious
    • Design
    • 在具体的处理器中,Itanium2中不同的节点大小、搜索方式(线性、二分)对查询性能的影响。

    Fingerprint

    Dive into the research topics of 'Making CSB + -Trees Processor Conscious'. Together they form a unique fingerprint.

    Cite this