Hardware-Assisted Transaction Processing

Transaction processing has been at the forefront of many influential advancements in the data management ecosystem. In the recent years,
many of these advancements have been triggered by the developments in the computer architecture community: multicore parallelism, large main memories, hardware transactional memory, non-volatile memory, remote direct memory access, etc. These developments led to re-thinking of the overall system design for transaction processing systems. In turn, several specialized transaction processing systems have evolved adopting a variety of system designs each with their unique pros/cons. The focus of this article is to survey the techniques proposed in recent years to scale-up transaction processing on modern multicore hardware, and assess how suitable these techniques are in the context of emerging many core hardware and trends in the computer architecture community in general.