Abstract
This paper presents an application of the theory of sorting networks to facilitate the synthesis of optimized general-purpose sorting libraries. Standard sorting libraries are often based on combinations of the classic Quicksort algorithm with insertion sort applied as base case for small, fixed, numbers of inputs. Unrolling the code for the base case by ignoring loop conditions eliminates branching, resulting in code equivalent to a sorting network. This enables further program transformations based on sorting network optimizations, and eventually the synthesis of code from sorting networks. We show that, if considering the number of comparisons and swaps, the theory predicts no real advantage of this approach. However, significant speed-ups are obtained when taking advantage of instruction level parallelism and non-branching conditional assignment instructions, both of which are common in modern CPU architectures. We provide empirical evidence that using code synthesized from efficient sorting networks as the base case for Quicksort libraries results in significant real-world speed-ups.
| Originalsprog | Engelsk |
|---|---|
| Tidsskrift | Lecture Notes in Computer Science |
| Sider (fra-til) | 127-142 |
| Antal sider | 16 |
| DOI | |
| Status | Udgivet - 17 dec. 2015 |
| Udgivet eksternt | Ja |
| Begivenhed | International Symposium on Logic-based Program Synthesis and Transformation - Siena, Italien Varighed: 13 jul. 2015 → 15 jul. 2015 Konferencens nummer: 25 |
Konference
| Konference | International Symposium on Logic-based Program Synthesis and Transformation |
|---|---|
| Nummer | 25 |
| Land/Område | Italien |
| By | Siena |
| Periode | 13/07/2015 → 15/07/2015 |